The present invention relates generally to computer memory devices and, more particularly, to devices and techniques for establishing information relating to the configuration or capabilities of memory devices, such as DRAMs.
The requirements of computer memory can vary with respect to capacity, speed, data bus width and other features depending on the application of the computer. Manufacturers of general purpose computers, for example, sometimes provide modular memory subsystems which include multiple slots or connectors for memory modules. Memory modules then can be mounted in one or more of the slots. The memory modules, in turn, may vary with respect to capacity, speed, data bus width, etc.
An exemplary computer uses a memory controller for converting a memory address supplied by a central processing unit (CPU) into the required address and control signals for accessing a particular memory location. The memory controller generates row address strobe (RAS), column address strobe (CAS), and write enable (WE) signals, and can be implemented in one or more integrated circuits. When the memory is modular, the memory controller and the CPU must receive information which defines or identifies the memory configuration in order to supply the required address and control signals.
Typically, each memory module provides a number of presence detect codes or bits which include information relating to the capacity of the memory module, its speed, etc. The configuration and capabilities of the memory module then can be determined from the presence detect bits. Examples of memory modules that provide presence detect bits include single in-line memory modules (SIMMs), dual in-line memory modules (DIMMs), and small outline dual in-line memory modules (SO-DIMMs).
Originally, a separate pin was provided for each bit of information using parallel presence detect (PPD) techniques. To allow additional information to be provided, serial presence detect (SPD) techniques have been introduced. Generally, an integrated circuit chip, which is a separate chip from an associated memory chip or memory module, stores and provides the SPD information. For example, a serial EEPROM can be used to store the presence detect information and generally requires only an enable pin and a single data pin. The SPD information must either be pre-programmed into the SPD chip or the assembler of the memory chip circuit board must program that information at the time of assembly. Since all the presence detect bits on each SPD chip must be programmed separately after fabrication of the SPD chip, a relatively high level of programming errors can be introduced. Failure rates as high as about 1 have been known to occur. Additionally, the wrong SPD chip occasionally is used for a particular memory chip, thereby increasing the average costs of manufacture. Accordingly, it is desirable to achieve a reduction in the overall manufacturing costs associated with computer memory modules as well as a reduction in the number of programming errors associated with presence detect information.
In general, according to one aspect, an integrated semiconductor memory chip can include hardwired presence detect data which can be accessed for transmission to a location external to the memory chip as well as logic allowing additional presence detect data to be programmed in the memory chip after fabrication of the memory chip.
Various implementations include one or more of the following features. The hardwired presence detect data can include multiple bits, wherein a value of each hardwired bit is based on whether a conductive region of the chip corresponding to that bit is connected electrically to a predetermined voltage when power is supplied to the chip. For example, the value of each hardwired bit can be based on whether the conductive region of the chip corresponding to that bit is connected electrically to ground. In some implementations, the difference between a first hardwired bit representing a digital high value and a second hardwired bit representing a digital low value can be implemented by the presence or absence of a portion of a metal layer on the memory chip. In other implementations, the difference between the first and second hardwired bits can be implemented by the presence or absence of a portion of a polysilicon layer. In yet other implementations, the difference between the first and second hardwired bits can be implemented by the presence or absence of doping in a portion of the semiconductor substrate on which the memory chip is fabricated.
The logic allowing additional presence detect data to be programmed in the memory chip after fabrication of the memory chip can include a programmable fuse corresponding to each bit of programmable presence detect data. Examples of such fuses include antifuses, laser fuses, and electrical fuses. In other implementations, the programmable presence detect data can be.implemented on the memory chip using a flash transistor corresponding to each bit of programmable presence detect data.
In some embodiments, the integrated semiconductor memory chip can include a counter for receiving a control signal and for providing address bits at its output in response to the control signal. The memory chip also can include a switching device for allowing the presence detect data to be selected individually in response to the address bits for serial transmission to a location external to the memory chip. In some implementations, the switching device can include a multiplexer or a cascade of transistors.
According to another aspect, a memory module includes multiple memory chips, wherein at least one of the memory chips includes presence.detect data which can be accessed for transmission to a location external to the memory module. Each of the memory chips on the module can have the same memory capacity, although this need not be the case. In one particular implementation, the memory chips include dynamic random access memory chips.
In yet another aspect, a computer system includes a central computer unit for supplying a memory address as well as a memory controller for converting a memory address supplied by the central processing unit into address and control signals to access a memory location in a memory module. The memory controller also can transmit presence detect data to the central processing unit. In addition, the computer system includes a memory module having drivers for receiving the address and control signals and multiple memory chips. At least one of the memory chips includes presence detect data which can be accessed for transmission to the memory controller.
In another aspect, a method of providing configuration information of a memory device includes hardwiring a first set of presence detect bits on an integrated semiconductor memory chip during fabrication of the memory chip. The act of hardwiring can be accomplished using a mask programmable photolithographic pattern. In addition, a second set of programmable presence detect bits can be provided on the memory chip.
The invention also features a method of providing information relating to a configuration or capabilities of a memory device having an integrated semiconductor memory chip that includes a set of programmable presence detect bits on the memory chip. The method includes setting a value for at least one of the programmable presence detect bits. The value of a programmable presence detect bit can be set, for example, by applying a voltage across an antifuse on the memory chip to form a short circuit, by directing radiation at a fuse on the memory chip to form an open circuit, or by raising a turn-on threshold voltage level of a transistor on the memory chip. If flash transistors are used, for example, then raising the turn-on threshold voltage can include applying a voltage across a drain and control gate of the transistor so as to trap charge in a floating gate of the transistor.
Another aspect relates to a method of providing information relating to configuration or capabilities of a memory module comprising at least one integrated semiconductor memory chip. The method includes accessing presence detect data stored on the at least one memory chip, and sending the presence detect data to a memory controller. The presence detect data can then be sent from the memory controller to a central processing unit. In some cases, the presence detect data is sent to the memory controller in serial form.
Storing the presence detect data on the memory chip(s) rather than on a separate integrated circuit can help reduce the number of integrated chips required for the memory module. Furthermore, hardwiring at least some of the presence detect data during fabrication of the chip, such as during photolithographic processes, can reduce the number of programming errors as well as the number of mismatches that might otherwise occur if a separate presence detect data chip were used. On the other hand, the capability of programming presence detect data after fabrication of the memory chip provides additional flexibility, allowing the foregoing techniques to be used with a wide variety of memory chips and modules. Furthermore, the foregoing techniques are easily integrated into conventional fabrication process flows for memory chips such as DRAMs.